Top Tech Jobs & Startup Jobs in Montreal

Designs and validates analog circuit models across abstraction levels, from mathematical descriptions to post-layout performance. Generates sub-block specifications from architecture and system models, verifies modeled performance, automates simulations, documents methodologies, presents results, and collaborates with design and systems teams to optimize circuit and system specifications.

Own block-level physical implementation for advanced FinFET semiconductor designs, including synthesis, SDC constraints, floorplanning, placement, clock-tree synthesis, routing, MCMM timing closure, ECOs, and physical verification sign-off. Collaborate with digital design teams to resolve implementation bottlenecks, automate flows with Tcl and Python, and prepare tape-out documentation. The role requires advanced-node tape-out experience, low-power implementation expertise, and proficiency with industry-standard EDA tools.

Build and deploy domain-specific AI and agentic tools for semiconductor engineering workflows. Responsibilities include designing reliable agentic systems, integrating LLM tools into analog, digital, and verification environments, creating evaluation pipelines, collaborating with engineering teams, and delivering modular, tested, maintainable code.

Directs silicon characterization strategy and execution across semiconductor product programs, overseeing validation plans, IC bring-up, debug, lab automation, ATE interfacing, evaluation hardware, and reporting. Leads cross-functional teams and external partners, supports customer evaluations and demonstrations, manages equipment and vendor decisions, and drives validation closure and release readiness for SerDes and other high-speed products.

Support advanced R&D efforts designing high-performance digital VLSI systems and control circuitry for high-speed serial links. The intern will use Cadence or Synopsys design flows, organize research findings, assist other digital design activities, and collaborate with mentors and senior leadership. The role is intended for MSc students in electrical or computer engineering and offers hands-on industrial research experience.

Support Advanced R&D by modeling new designs and architectures using signal processing techniques. Organize research findings, assist other business areas with modeling, and contribute to industrial research projects involving analog circuits, communications, DSP, and complex interconnect technologies.

Partners with the CTO to develop next-generation communication and interconnect architectures. Builds models, simulations, and prototypes; explores signaling, coding, equalization, and system-level techniques; evaluates performance, power, latency, area, and manufacturability; and translates theoretical concepts into silicon-ready architectures and intellectual property. Provides technical leadership across research, architecture, and product teams.

Develop and maintain MATLAB, Python, and C++ system-level models for SerDes communication links. Define transceiver block specifications and link budgets with system architects, and support analog, digital, and verification teams. Apply control theory, signal processing, digital communication, signal integrity, circuit simulation, and software engineering practices to semiconductor interconnect design.

Design and verify high-speed digital circuits for serial transceivers, DDR, and memory interfaces. Responsibilities include RTL design, analog-digital interface specification, synthesis, timing analysis, verification, chip integration, protocol analysis, and post-silicon lab bring-up. The engineer will collaborate with analog, verification, physical implementation, and customer teams while supporting requirements, debugging, characterization, and product delivery.

Conduct research on simultaneous bidirectional communication over wideband copper serial links. Develop behavioral models of copper channels and transceiver architectures, investigate analog and digital self-interference cancellation, evaluate channel impairments and non-idealities, and simulate communication building blocks using Python or circuit-level CAD tools. Assess data rates, energy efficiency, and implementation complexity, then present findings in a technical report and oral presentation.