Top Tech Jobs & Startup Jobs in Montreal

Leads custom analog layout and verification for high-speed SerDes and memory I/O circuits in advanced semiconductor nodes. Collaborates with design teams on circuit implementation, supports IP and chip-level integration, assists with customer requirements and IP delivery, and applies high-speed layout techniques involving matching, parasitic minimization, power grids, ESD, EM, and IR-drop analysis.

Research and develop analog and signal-processing techniques for simultaneous bidirectional communication over high-speed copper serial links. Build behavioral channel and transceiver models, study self-interference cancellation, evaluate channel impairments and non-idealities, and design and simulate circuit building blocks using Python or circuit-level CAD tools. The intern will assess data rates, energy efficiency, and implementation complexity, then present findings in a technical report and oral presentation.

The DFT Engineer will implement hierarchical MBIST, scan, boundary scan, and IJTAG methodologies; generate ATPG patterns; analyze fault coverage; perform timing simulations; define test-mode constraints; debug silicon issues; and collaborate with test and production engineering teams during device probe and final-test bring-up. The role requires strong debugging, scripting, communication, and semiconductor design-for-test experience.

Design, model, verify, and integrate custom high-speed analog circuits for SerDes transceivers in advanced semiconductor technologies. Responsibilities include analog IP and chip-level integration, circuit simulation, layout verification, customer support, silicon collaboration, and design status reporting. The role focuses on circuits such as equalizers, clock generators, PLLs, DLLs, CDRs, ADCs, DACs, amplifiers, buffers, regulators, filters, serializers, and output drivers.

Design and verify custom analog and mixed-signal circuits for advanced semiconductor technologies. Responsibilities include block specifications, circuit modeling, layout and floor planning, pre- and post-layout verification, simulation, signal-integrity analysis, and collaboration with architecture, integration, modeling, and layout teams. The role also supports post-silicon bring-up, debugging, characterization, productization, technical reporting, and concept-level architecture development.

Characterize high-speed SerDes IP products, document test procedures and results, develop Python automation scripts, and debug evaluation boards, silicon ICs, test equipment, and software. The role requires hands-on laboratory measurement experience, understanding of signal integrity and transmitter/receiver fundamentals, and strong communication and ownership skills.

Lead end-to-end characterization of high-speed SerDes silicon above 20 Gbaud, including jitter, eye diagrams, BER, margin, PVT, transmitter and receiver, S-parameter, TDR, and insertion-loss measurements. Collaborate with analog, digital, and IP teams; define test plans; document procedures and results; and develop Python automation for testing, data analysis, and reporting.