Teams at Eliyan Corporation

Lead product strategy and execution for die-level co-packaged optics, selecting and qualifying VCSELs, photodetectors, lenses, and fiber interfaces; define assembly-aware optical specs, drive optical-electrical co-design within foundry constraints, and coordinate cross-functional alignment with silicon, packaging, and marketing teams.

The Senior Staff Physical Verification Engineer leads all physical verification activities including DRC, LVS, and DFM for advanced chip designs, ensuring compliance across multiple foundries and technologies.

Lead architecture and RTL implementation of high-speed SerDes digital IP (224G/448G PAM4), including DSP equalization, CDR, FEC, PHY control, RTL quality, AMS integration, tapeout coordination, standards work, firmware interfaces, and post-silicon debug.