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Block

ASIC Digital Design Engineer

Posted 9 Hours Ago
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Remote
Hybrid
7 Locations
Senior level
Remote
Hybrid
7 Locations
Senior level
As an ASIC Digital Design Engineer, you will focus on chip/block design and verification, IP integration, synthesis, and debugging RTL/GLS failures, contributing to innovative mining ASIC development.
The summary above was generated by AI
Proto is accelerating the world's transition to an open economy with products that increase access and independence for everyone. We're building Bitkey, a simple and safe self-custody bitcoin wallet that will put customers in control, as well as hardware and software that will help decentralize bitcoin mining and enable new and innovative use cases for bitcoin mining. We're developing these products in the open - you can read more about them at bitkey.build and mining.build . Within Proto, our Bitcoin Products team delivers the product and go-to-market strategy, software, firmware, and custom silicon needed to make Bitkey and our ambitious mining initiatives a reality. Come build the future of money with us!
We believe everyone should be able to participate and thrive in the economy. We believe bitcoin plays an essential role in the future of payments and the world's economy. We believe that the status quo of bitcoin mining does not serve the mission of the bitcoin ecosystem. So we're building a bitcoin mining rig powered by Block designed custom ASICs. With our mining rig, we can address many issues such as the concentration of hardware supply in certain countries and incompatibility with clean energy sources. As an ASIC Digital Design Engineer, you will work closely with other digital designers and physical designers to develop the next generation of mining ASIC. In particular, the challenges of chip/block level implementation, timing, integration, and verification are critical parts of this role.
We are a distributed team across the U.S. and Canada, and are hiring for a single remote position.
Main responsibilities will include:
  • Chip/block level design and verification
  • IP integration
  • Synthesis
  • Debugging RTL and GLS failures

You Have:
  • BS in Electrical Engineering or Computer Engineering with at least 8 years of digital design and verification industry experience
  • Proven number of years of industry RTL (Verilog / System Verilog) ASIC design experience through implementations targeting leading edge ASIC technologies
  • Experience with simulation and debugging with functional verification tools from Synopsys including Gate-level simulations
  • Proficient with scripting languages such as Python, Perl, TCL, Makefile.
  • Understanding of the SPI/UART communication protocol
  • Understanding of the IP integration and interactions within an ASIC
  • Demonstrates the ability to debug issues and quickly identify viable solutions

Even better if you have experience with:
  • MS in Electrical Engineering or Computer Engineering
  • STA timing signoff experience using Synopsys PrimeTime
  • Some Knowledge of physical PnR, custom cells and library etc.
  • Background working with Synopsys EDA tools (e.g. Design Compiler/Fusion Compiler, PrimeTime, Formality, Spyglass, Verdi, VCS etc)
  • Some Knowledge of design and verification on FPGA

We're working to build a more inclusive economy where our customers have equal access to opportunity, and we strive to live by these same values in building our workplace. Block is an equal opportunity employer evaluating all employees and job applicants without regard to identity or any legally protected class. We will consider qualified applicants with arrest or conviction records for employment in accordance with state and local laws and "fair chance" ordinances.
We believe in being fair, and are committed to an inclusive interview experience, including providing reasonable accommodations to disabled applicants throughout the recruitment process. We encourage applicants to share any needed accommodations with their recruiter, who will treat these requests as confidentially as possible. Want to learn more about what we're doing to build a workplace that is fair and square? Check out our I+D page .
While there is no specific deadline to apply for this role, U.S. roles are typically open for an average of 55 days before being filled by a successful candidate. Please refer to the date listed at the top of this job page for when this role was first posted.
Block takes a market-based approach to pay, and pay may vary depending on your location. U.S. locations are categorized into one of four zones based on a cost of labor index for that geographic area. The successful candidate's starting pay will be determined based on job-related skills, experience, qualifications, work location, and market conditions. These ranges may be modified in the future.
To find a location's zone designation, please refer to this resource . If a location of interest is not listed, please speak with a recruiter for additional information.
Zone A:
$251,600 - $377,400 USD
Zone B:
$251,600 - $377,400 USD
Zone C:
$251,600 - $377,400 USD
Zone D:
$251,600 - $377,400 USD
Every benefit we offer is designed with one goal: empowering you to do the best work of your career while building the life you want. Remote work, medical insurance, flexible time off, retirement savings plans, and modern family planning are just some of our offering. Check out our other benefits at Block.
Block, Inc. (NYSE: XYZ) builds technology to increase access to the global economy. Each of our brands unlocks different aspects of the economy for more people. Square makes commerce and financial services accessible to sellers. Cash App is the easy way to spend, send, and store money. Afterpay is transforming the way customers manage their spending over time. TIDAL is a music platform that empowers artists to thrive as entrepreneurs. Bitkey is a simple self-custody wallet built for bitcoin. Proto is a suite of bitcoin mining products and services. Together, we're helping build a financial system that is open to everyone.

Top Skills

Gate-Level Simulations
Makefile
Perl
Python
Synopsys Eda Tools
System Verilog
Tcl
Verilog

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